Author(s): Gamage Sanjeewa Samarasinghe

Abstract: The FPGA-based logic analyzer is the level of a digital signal analyzing and encoding for understanding communication digital bit. In digital Instruments communications, each device internally has some sort of protocol. As an example, I2C and SPI. Some developers analyze digital signals to clarify or treble soothing problems. At that time Logic Analyzer are much more important. In this project develop a digital-level logic analyzer using FPGA based chip.FPGA (Field-Programmable Gate Array) is a component for developing circuits using hardware definition languages. In this case, VDHL is the language, and Xilinx – Spartan 6 is the development board it used. There has a limitation to the maximum usage of FPGA. In Xilinx – Spartan 6 maximum SLICES (LUTs & Flip Flops) are 360. It can create 2^12 (4096) maximum RAM cells for devices.In this device, the main components are SRAM and its content 2^12 memory addresses. SRAM in this device got two counting’s and two controls for each side. Then SRAM content means to write and read data to SRAM using an input data analyzer. That component is Triggered by user-defined controls in python GUI using computer processing.All of the command generates to control device using user defend python GUI. In the GUI content select sample rate and quantity. Each of parameters can change according to the user defined. So, all control defined by user according to the data use got. Sampling rate can change 1 Hz to 12.5 MHz and maximum sampling quantity was 2^12 (4096). According past experience user can decided best suitable sampling rate.FPGA device and computer data communication done by UART (Universal Asynchronous Receiver Transmitter). Mainly hexadecimal numbers communication don for understand data to computer and ASCII character send for give command devices.

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